SEMICONDUCTOR STORAGE DEVICE
To provide a semiconductor storage device capable of improving an integration degree.SOLUTION: A semiconductor storage device of an embodiment comprises a first wiring, a second wiring, a laminate, a columnar body, and a diode. The first wiring extends in a first direction. The second wiring extends...
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Main Authors | , , , , |
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Format | Patent |
Language | English Japanese |
Published |
29.09.2023
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Subjects | |
Online Access | Get full text |
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Summary: | To provide a semiconductor storage device capable of improving an integration degree.SOLUTION: A semiconductor storage device of an embodiment comprises a first wiring, a second wiring, a laminate, a columnar body, and a diode. The first wiring extends in a first direction. The second wiring extends in a second direction crossing the first direction, and is separated from the first wiring in a third direction crossing the first direction and the second direction. The laminate is arranged between the first wiring and the second wiring and includes a plurality of conductive layers and a plurality of insulation layers. The columnar body includes an electrode part arranged between the first wiring and the second wiring and extending in the laminate in the third direction, a memory layer arranged between the electrode part and the plurality of conductive layers, and a selection layer arranged between the electrode part and the first wiring. The diode is arranged between the electrode part and the second wiring.SELECTED DRAWING: Figure 2
【課題】集積度の向上を図ることができる半導体記憶装置を提供することである。【解決手段】実施形態の半導体記憶装置は、第1配線と、第2配線と、積層体と、柱状体と、ダイオードとを備える。前記第1配線は、第1方向に延びている。前記第2配線は、前記第1方向とは交差する第2方向に延びており、前記第1方向および前記第2方向とは交差する第3方向で前記第1配線から離れている。前記積層体は、前記第1配線と前記第2配線との間に配置され、複数の導電層と複数の絶縁層とを含む。前記柱状体は、前記第1配線と前記第2配線との間に配置されて前記積層体内を前記第3方向に延びた電極部と、前記電極部と前記複数の導電層との間に配置されたメモリ層と、前記電極部と前記第1配線との間に配置された選択層と、を含む。前記ダイオードは、前記電極部と前記第2配線との間に配置されている。【選択図】図2 |
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Bibliography: | Application Number: JP20220043670 |