DISPLAY DEVICE

• Main Authors: YOSHINO HIKARU, MORINAGA JUNICHI
• Format: Patent
• Language: English; Japanese
• Published: 22.09.2023
• Subjects: ADVERTISING; CRYPTOGRAPHY; DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH ISMODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THEDEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY,COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g.SWITCHING, GATING, MODULATING OR DEMODULATING; DISPLAY; DISPLAYING; EDUCATION; FREQUENCY-CHANGING; LABELS OR NAME-PLATES; NON-LINEAR OPTICS; OPTICAL ANALOGUE/DIGITAL CONVERTERS; OPTICAL LOGIC ELEMENTS; OPTICS; PHYSICS; SEALS; SIGNS; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF

To improve uniformity pertaining to a cell gap.SOLUTION: A display device 10 includes: an array substrate 21; a counter substrate 20; a first pixel electrode 24α; a second pixel electrode 24β spaced apart from the first pixel electrode in a first direction; a third pixel electrode 24γ spaced apart from the second pixel electrode in the first direction; first wiring lines 31α and 32α positioned between the first pixel electrode and the second pixel electrode and extending in a second direction intersecting the first direction; a second pixel electrode row 24βC including the second pixel electrode 24β and composed of a plurality of pixel electrodes 24 aligned in the second direction; a third pixel electrode row 24γC including the third pixel electrode 24γ and composed of a plurality of pixel electrodes aligned in the second direction; a first insulating film 36 disposed on a lower layer side of the first wiring line; and a spacer 40 protruding from the counter substrate toward the array substrate. A portion of a flattening film 36 overlapping the spacer is a higher portion 36A higher than a remaining portion.SELECTED DRAWING: Figure 4 【課題】セルギャップに係る均一性を改善する。【解決手段】表示装置１０は、アレイ基板２１と、対向基板２０と、第１画素電極２４αと、第１画素電極に対して第１方向に間隔を空けて配される第２画素電極２４βと、第２画素電極に対して第１方向に間隔を空けて配される第３画素電極２４γと、第１画素電極と第２画素電極との間に位置し、第１方向と交差する第２方向に沿って延在する第１配線３１α，３２αと、第２画素電極２４βを含み、第２方向に沿って並ぶ複数の画素電極２４からなる第２画素電極列２４βＣと、第３画素電極２４γを含み、第２方向に沿って並ぶ複数の画素電極からなる第３画素電極列２４γＣと、第１配線の下層側に配される第１絶縁膜３６と、対向基板からアレイ基板に向けて突出するスペーサ４０と、を備え、平坦化膜３６は、スペーサと重畳する部分が、残りの部分よりも高い高位部３６Ａとなっている。【選択図】図４