SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

• Main Authors: YAMASAKI MASANAO, YOSHIDA ISAMU
• Format: Patent
• Language: English; Japanese
• Published: 05.09.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To provide: a semiconductor device in which voids in a bonding layer can be reduced more than in the past and a substrate and a semiconductor chip are joined by sintering; and a method for manufacturing a semiconductor device in which a solvent in a bonding layer raw material paste can be removed in a shorter time than in the past.SOLUTION: A semiconductor device according to the present invention includes a substrate 113, a semiconductor chip 100, and a bonding layer 110 for bonding the substrate 113 and the semiconductor chip 100. The bonding layer 110 is made of sintered metal and has concave portions 111 constricted toward the center of the bonding layer 110 when the semiconductor device is viewed from above.SELECTED DRAWING: Figure 1B 【課題】基板と半導体チップとを焼結接合によって接合させた半導体装置において、接合層中のボイドを従来よりも低減できる半導体装置を提供し、かつ、従来よりも短時間で接合層原料ペースト中の溶剤を除去できる半導体装置の製造方法を提供する。【解決手段】本発明の半導体装置は、基板１１３と、半導体チップ１００と、基板１１３と半導体チップ１００とを接合する接合層１１０と、を有する半導体装置において、接合層１１０は、焼結金属で構成され、半導体装置を平面視した場合に、接合層１１０の中心に向かってくびれた凹部１１１を有することを特徴とする。【選択図】図１Ｂ