SEMICONDUCTOR DEVICE
To provide a semiconductor device suitable for miniaturization.SOLUTION: A semiconductor device comprises a first transistor, a second transistor located above the first transistor, a barrier layer located between the first and second transistors, a first electrode located between the first transist...
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Main Authors | , , , , , |
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Format | Patent |
Language | English Japanese |
Published |
29.08.2023
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Subjects | |
Online Access | Get full text |
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Summary: | To provide a semiconductor device suitable for miniaturization.SOLUTION: A semiconductor device comprises a first transistor, a second transistor located above the first transistor, a barrier layer located between the first and second transistors, a first electrode located between the first transistor and the barrier layer, and a second electrode being located between the barrier layer and the second transistor, and superposed on the first electrode while interposing the barrier layer therebetween. The gate electrode, the first electrode of the first transistor, and one of the source electrode and the drain electrode of the second transistor are connected electrically, the first transistor has a channel formed in a first semiconductor layer containing a single crystal semiconductor, and the second transistor has a channel formed in a second semiconductor layer containing an oxide semiconductor.SELECTED DRAWING: Figure 2
【課題】微細化に適した半導体装置を提供すること。【解決手段】第1のトランジスタと、第1のトランジスタの上方に位置する第2のトランジスタと、第1のトランジスタと第2のトランジスタとの間に位置するバリア層と、第1のトランジスタとバリア層との間に位置する第1の電極と、バリア層と第2のトランジスタとの間に位置し、バリア層を挟んで第1の電極と重畳する第2の電極と、を備える構成とする。また第1のトランジスタのゲート電極、第1の電極、及び第2のトランジスタのソース電極またはドレイン電極の一方は、互いに電気的に接続し、第1のトランジスタは、単結晶半導体を含む第1の半導体層にチャネルが形成され、第2のトランジスタは、酸化物半導体を含む第2の半導体層にチャネルが形成される。【選択図】図2 |
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Bibliography: | Application Number: JP20230105210 |