SEMICONDUCTOR CHIP, SOLID-STATE IMAGING ELEMENT, AND ELECTRONIC DEVICE

• Main Author: OKANO HITOSHI
• Format: Patent
• Language: English; Japanese
• Published: 08.03.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC COMMUNICATION TECHNIQUE; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; PICTORIAL COMMUNICATION, e.g. TELEVISION; SEMICONDUCTOR DEVICES

To provide: a semiconductor chip which is capable of further reducing a thickness of a silicon substrate, the reduction of thickness being required for 3D deposition, while having a structure that does not affect device characteristics; a solid-state imaging element; and an electronic device.SOLUTION: A semiconductor chip has a configuration that comprises: a first semiconductor chip which includes a photodiode; a second semiconductor chip which includes a signal processing circuit for signals from the photodiode while being stacked on the first semiconductor chip; a first insulating film which contains oxygen and is stacked on a second surface of the second semiconductor chip, the second surface being on a side opposite to a first surface on which the first semiconductor chip is stacked; and a second insulating film which contains oxygen and is stacked on the first insulating film. Due to such a configuration, an occurrence of leakage in a depletion layer of a transistor within the semiconductor chip is prevented, enabling a reduced thickness thereof.SELECTED DRAWING: Figure 1 【課題】３Ｄ積層において要求されるシリコン基板の厚みをさらに薄くすることが出来、かつ、デバイス特性に影響無い構造を有する半導体チップ、固体撮像素子及び電子機器を提供する。【解決手段】フォトダイオードを含む第１半導体チップと、フォトダイオードからの信号処理回路を含み第１半導体チップに積層された第２半導体チップと、第２半導体チップの第１半導体チップが積層されている第１の面の反対側の第２の面に積層された酸素を含む第１絶縁膜と、第１絶縁膜上に積層された酸素を含む第２絶縁膜と、を有する構成とすることにより半導体チップ内のトランジスタの空乏層におけるリークの発生を防止し、薄膜化を可能にした。【選択図】図１