WIRING BOARD AND DISPLAY DEVICE

To reduce the resistance distribution of position detection electrodes and block an electric field from the wire.SOLUTION: A wiring board 21 includes a plurality of position detection wires 31 extending along a first direction and transmitting at least a position detection signal, a plurality of pos...

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Bibliographic Details
Main Authors YOSHINO HIKARU, MORINAGA JUNICHI
Format Patent
LanguageEnglish
Japanese
Published 20.10.2022
Subjects
ADVERTISING
CALCULATING
COMPUTING
COUNTING
CRYPTOGRAPHY
DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH ISMODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THEDEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY,COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g.SWITCHING, GATING, MODULATING OR DEMODULATING
DISPLAY
DISPLAYING
EDUCATION
ELECTRIC DIGITAL DATA PROCESSING
FREQUENCY-CHANGING
LABELS OR NAME-PLATES
NON-LINEAR OPTICS
OPTICAL ANALOGUE/DIGITAL CONVERTERS
OPTICAL LOGIC ELEMENTS
OPTICS
PHYSICS
SEALS
SIGNS
TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF
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Summary:To reduce the resistance distribution of position detection electrodes and block an electric field from the wire.SOLUTION: A wiring board 21 includes a plurality of position detection wires 31 extending along a first direction and transmitting at least a position detection signal, a plurality of position detection electrodes 30 connected to the position detection wires 31 and disposed at intervals in the first direction, a wire 26 existing between the adjacent position detection electrodes 30 in the first direction and extending along a second direction intersecting with the first direction, a plurality of connection wires 33 extending along the first direction, connected to the position detection electrodes 30, and disposed at intervals in the second direction, and a short-circuiting wire 34 that extends along the second direction, is disposed overlapping on the wire 26 through insulating films F2, F5, and F6, and short-circuits the connection wires 33.SELECTED DRAWING: Figure 10 【課題】位置検出電極の抵抗分布を低減させるとともに配線からの電界を遮蔽する。【解決手段】配線基板２１は、第１方向に沿って延在し少なくとも位置検出信号を伝送する複数の位置検出配線３１と、位置検出配線３１に接続される位置検出電極３０であって、第１方向について間隔を空けて配される複数の位置検出電極３０と、第１方向について隣り合う位置検出電極３０の間に位置していて第１方向と交差する第２方向に沿って延在する配線２６と、第１方向に沿って延在し位置検出電極３０に接続される接続配線３３であって、第２方向について間隔を空けて配される複数の接続配線３３と、第２方向に沿って延在し配線２６に対して絶縁膜Ｆ２，Ｆ５，Ｆ６を介して重畳するよう配されていて複数の接続配線３３を短絡する短絡配線３４と、を備える。【選択図】図１０
Bibliography:Application Number: JP20210065145