SEMICONDUCTOR STORAGE DEVICE

• Main Authors: IKEGAMI KAZUTAKA, MAEDA TAKASHI, SANO KYOSUKE, FUNATSUKI RIEKO
• Format: Patent
• Language: English; Japanese
• Published: 03.10.2022
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INFORMATION STORAGE; PHYSICS; SEMICONDUCTOR DEVICES; STATIC STORES

To provide a semiconductor storage device whose readout operation is accelerated.SOLUTION: A semiconductor storage device includes a control circuit that applies first voltage to a first conductive layer WLE4, a second conductive layer WLO4, and a sixth conductive layer WLO5, applies second voltage, which is higher than the first voltage, to a third conductive layer WLE3 and a fifth conductive layer WLE5, then applies third voltage, which is lower than the first voltage, to the first conductive layer, applies fourth voltage, which is lower than the first voltage, to the sixth conductive layer, applies fifth voltage, which is lower than the first voltage, to the second conductive layer, then applies sixth voltage, which is higher than the third voltage and lower than the first voltage, to the first conductive layer, applies seventh voltage, which is different from the fourth voltage and lower than the first voltage, to the sixth conductive layer, and applies eighth voltage, which is lower than the fifth voltage, to the second conductive layer.SELECTED DRAWING: Figure 18 【課題】読み出し動作の高速化がされた半導体記憶装置を提供する。【解決手段】半導体記憶装置は、第１導電層ＷＬＥ４、第２導電層ＷＬＯ４及び第６導電層ＷＬＯ５に第１電圧を印加し、第３導電層及ＷＬＥ３び第５導電層ＷＬＥ５に第１電圧より高い第２電圧を印加し、その後、第１導電層に第１電圧より低い第３電圧を印加し、第６導電層に第１電圧より低い第４電圧を印加し、第２導電層に第１電圧より低い第５電圧を印加し、その後、第１導電層に第３電圧より高く第１電圧より低い第６電圧を印加し、第６導電層に前記第４電圧と異なり第１電圧より低い第７電圧を印加し、第２導電層に第５電圧より低い第８電圧を印加する、制御回路を備える。【選択図】図１８