IMAGING ELEMENT AND IMAGING DEVICE
To downsize an imaging element formed by laminating a plurality of semiconductor substrates.SOLUTION: The imaging element has a first semiconductor substrate and a second semiconductor substrate. The first semiconductor substrate has a photoelectric conversion part for performing photoelectric conve...
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Main Authors | , |
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Format | Patent |
Language | English Japanese |
Published |
22.06.2022
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Subjects | |
Online Access | Get full text |
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Summary: | To downsize an imaging element formed by laminating a plurality of semiconductor substrates.SOLUTION: The imaging element has a first semiconductor substrate and a second semiconductor substrate. The first semiconductor substrate has a photoelectric conversion part for performing photoelectric conversion on incident light. The second semiconductor substrate includes: a pixel circuit for generating an image signal according to charges generated by photoelectric conversion; an element separation region for separating elements of the pixel circuit; and a high impurity concentration region arranged in the lower layer of the element separation region, the region having a high impurity concentration and being connected to the first semiconductor substrate to share a reference potential. The first semiconductor substrate is laminated on the back side of the second semiconductor substrate.SELECTED DRAWING: Figure 7
【課題】複数の半導体基板が積層されて構成される撮像素子を小型化する。【解決手段】撮像素子は、第1の半導体基板及び第2の半導体基板を有する。第1の半導体基板は、入射光の光電変換を行う光電変換部を備える。第2の半導体基板は、光電変換により生成される電荷に応じた画像信号を生成する画素回路、当該画素回路の素子を分離する素子分離領域及び当該素子分離領域の下層に配置されるとともに高い不純物濃度に構成されて基準電位を共通にするために第1の半導体基板と接続される領域である高不純物濃度領域を備えて裏面側に第1の半導体基板が積層される。【選択図】図7 |
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Bibliography: | Application Number: JP20200205401 |