MEMORY DEVICE

• Main Authors: MAEDA TAKASHI, TANAKA REIKA, SAITO MASUMI, FUNATSUKI RIEKO, SHIGA HIDEHIRO
• Format: Patent
• Language: English; Japanese
• Published: 04.04.2022
• Subjects: ELECTRICITY; INFORMATION STORAGE; PHYSICS; STATIC STORES

To improve the properties of a memory device.SOLUTION: A memory device of an embodiment includes: first to third conductive layers above a substrate; a pillar which includes a ferroelectric substance adjacent to the conductive layer; a memory cell which includes a first transistor provided between the first conductive layer and the pillar, a second transistor provided between the second conductive layer and the pillar, and a ferroelectric transistor provided between the third conductive layer and the pillar; and a circuit which executes first operation S10 of setting the memory cell in a program state, second operation S20 of setting the memory cell in an erasure state by use of a first voltage, and third operation S11 of applying, to a first memory cell, a second voltage higher than the first voltage. The first voltage has a negative first voltage value, and the second voltage has a negative second voltage value higher than the first voltage value. The circuit executes the third operation between the first operation and the second operation.SELECTED DRAWING: Figure 11 【課題】メモリデバイスの特性を向上する。【解決手段】実施形態のメモリデバイスは、基板の上方の第１乃至第３の導電層と、導電層に隣り合う強誘電体層を含むピラーと、第１の導電層とピラーとの間の第１のトランジスタと、第２の導電層とピラーとの間の第２のトランジスタと、第３の導電層とピラーとの間の強誘電体トランジスタを含むメモリセルと、メモリセルをプログラム状態に設定する第１の動作Ｓ１０、第１の電圧を用いてメモリセルを消去状態に設定する第２の動作Ｓ２０、及び第１の電圧より高い第２の電圧を第１のメモリセルに印加する第３の動作Ｓ１１を実行する回路と、を含む。第１の電圧は、負の第1の電圧値を有し、第２の電圧は、第１の電圧値より高い負の第２の電圧値を有する。回路は、第３の動作を、第１の動作と第２の動作との間に実行する。【選択図】 図１１