SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

To suppress a crack at the interface between two semiconductor layers with different carrier concentrations in a semiconductor device composed of a gallium oxide-based semiconductor.SOLUTION: A semiconductor device includes a first semiconductor layer and a second semiconductor layer. The first semi...

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Bibliographic Details
Main Author MIYAKE HIROKI
Format Patent
LanguageEnglish
Japanese
Published 31.03.2022
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Summary:To suppress a crack at the interface between two semiconductor layers with different carrier concentrations in a semiconductor device composed of a gallium oxide-based semiconductor.SOLUTION: A semiconductor device includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is an n-type layer composed of a gallium oxide-based semiconductor. The second semiconductor layer is an n-type layer which is composed of a gallium oxide semiconductor, is in contact with the first semiconductor layer, and has an electrically active donor concentration higher than the electrically active donor concentration of the first semiconductor layer. A difference between the donor concentration of the first semiconductor layer and the donor concentration of the second semiconductor layer is smaller than a difference between the electrically active donor concentration of the first semiconductor layer and the electrically active donor concentration of the second semiconductor layer.SELECTED DRAWING: Figure 2 【課題】 酸化ガリウム系半導体により構成された半導体装置において、キャリア濃度が異なる2つの半導体層の界面におけるクラックを抑制する。【解決手段】 半導体装置であって、第1半導体層と第2半導体層を有する。第1半導体層は、酸化ガリウム系半導体によって構成されているn型層である。第2半導体層は、酸化ガリウム系半導体によって構成されており、前記第1半導体層に接しており、前記第1半導体層の電気的アクティブドナー濃度よりも高い電気的アクティブドナー濃度を有するn型層である。前記第1半導体層のドナー濃度と前記第2半導体層のドナー濃度との差が、前記第1半導体層の前記電気的アクティブドナー濃度と前記第2半導体層の前記電気的アクティブドナー濃度の差よりも小さい。【選択図】図2
Bibliography:Application Number: JP20200157824