SIMULATION METHOD, PROGRAM AND SIMULATION DEVICE

To provide a simulation method and the like capable obtaining excellent accuracy even if the frequency is low.SOLUTION: A C-V characteristic model including a plurality of discrete interface state densities where electrons are trapped and released according to changes in voltage to be applied to a m...

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Bibliographic Details
Main Authors NISHIGUCHI MASAYA, HASHIZUME TAMOTSU
Format Patent
LanguageEnglish
Japanese
Published 10.03.2022
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Summary:To provide a simulation method and the like capable obtaining excellent accuracy even if the frequency is low.SOLUTION: A C-V characteristic model including a plurality of discrete interface state densities where electrons are trapped and released according to changes in voltage to be applied to a metal, is used for an interface between a semiconductor and an insulator. The C-V characteristic model indicates third capacitance according to changes in voltage. The third capacitance includes first capacitance according to a depletion layer formed at the interface, second capacitance according to the plurality of discrete interface state densities, and capacitance of the insulator. The first capacitance and the second capacitance are connected to each other in parallel and further the first capacitance and the second capacitance connected in parallel are connected in series to the capacitance of the insulator. The first capacitance according to first voltage applied to the metal is calculated, and the second capacitance is calculated from an amount of electrons released from first interface state density according to the first voltage, of the plurality of discrete interface state densities. When the second capacitance is calculated, the first interface state density according to the first voltage is gradually changed by changing the first voltage gradually.SELECTED DRAWING: Figure 15 【課題】周波数が低い場合でも優れた精度が得られるシミュレーション方法等を提供する。【解決手段】半導体と絶縁体との界面に、金属に印加される電圧の変化に伴って電子が捕獲及び放出される複数の離散的な界面準位を含むC-V特性モデルを使用し、C-V特性モデルは、電圧の変化に応じた第3容量を示し、第3容量は、界面に形成された空乏層に応じた第1容量と、複数の離散的な界面準位に応じた第2容量と、絶縁体の容量と、を備え、第1容量と、第2容量とは並列接続され、さらに並列接続された第1容量と第2容量とに、絶縁体の容量が直列接続される。金属に印加された第1電圧に応じた第1容量を算出し、複数の離散的な界面準位のうちで第1電圧に応じた第1界面準位から放出される電子の量から第2容量を算出し、第2容量を算出する際には、第1電圧を段階的に変化させることで、当該第1電圧に応じた第1界面準位を段階的に変化させる。【選択図】図15
Bibliography:Application Number: JP20200144932