ADJUSTING METHOD OF OPERATION CONDITIONS OF SEMICONDUCTOR STORAGE DEVICE

• Main Author: SUZUKI SHINJI
• Format: Patent
• Language: English; Japanese
• Published: 04.03.2022
• Subjects: ELECTRICITY; INFORMATION STORAGE; PHYSICS; STATIC STORES

To provide an adjusting method of operation conditions of a semiconductor storage device capable of realizing high-speed operation.SOLUTION: An adjusting method of operation conditions relates to a semiconductor storage device including: a substrate; a plurality of first conductive layers arranged in a direction intersecting a surface of the substrate; a plurality of first semiconductor layers facing the plurality of first conductive layers; a second semiconductor layer connected to one end portions of the plurality of first semiconductor layers; and a charge storage layer provided between the plurality of first conductive layer and the plurality of first semiconductor layers. At a predetermined timing of program operation, a program voltage or a write path voltage is supplied to a second conductive layer that is one of the plurality of first conductive layers. In this adjusting method, a first operation of supplying the write path voltage to the second conductive layer and supplying the program voltage to a third conductive layer that is one of the plurality of first conductive layer and a second operation of supplying a verify voltage smaller than the write path voltage to the second conductive layer and supplying a voltage smaller than the program voltage to the third conductive layer are executed.SELECTED DRAWING: Figure 11 【課題】高速動作を実現可能な半導体記憶装置の動作条件の調整方法を提供する。【解決手段】動作条件の調整方法は、基板と、基板の表面と交差する方向に並ぶ複数の第１導電層と、複数の第１導電層と対向する複数の第１半導体層と、複数の第１半導体層の一端部に接続された第２半導体層と、複数の第１導電層と複数の第１半導体層との間に設けられた電荷蓄積層と、を備える半導体記憶装置に関する。プログラム動作の所定のタイミングにおいて、複数の第１導電層のうちの一つである第２導電層にプログラム電圧又は書込パス電圧が供給される。この調整方法においては、第２導電層に書込パス電圧を供給し、複数の第１導電層のうちの一つである第３導電層にプログラム電圧を供給する第１動作と、第２導電層に書込パス電圧よりも小さいベリファイ電圧を供給し、第３導電層にプログラム電圧よりも小さい電圧を供給する第２動作と、を実行する。【選択図】図１１