PRINT CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF, AND ELECTRONIC COMPONENT MOUNTING DEVICE AND MANUFACTURING METHOD THEREOF

• Main Authors: NAMATAME KAZUHIKO, KONDO HARUHIKO
• Format: Patent
• Language: English; Japanese
• Published: 18.02.2022
• Subjects: CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS; PRINTED CIRCUITS

To provide a manufacturing method of a print circuit board, which easily suppresses etching of a copper conductor layer.SOLUTION: A manufacturing method of a print circuit board, includes: a resist layer forming step of forming a resist layer having a predetermined pattern form so as to cover one part of a copper conductor layer onto a substrate having the copper conductor layer in the predetermined pattern form; an etching step of etching a front surface of the copper conductive layer which is not coated with the resist layer in a concave form; and a solder coat layer formation step of forming a solder coating layer onto the copper conductor layer to be etched in the concave form. In the etching step, a gap is formed in a lower part of the resist layer by etching a region containing one part of the copper conductive layer contacted to a bottom surface of the resist layer in the neighborhood of the copper conductive layer which is not coated with the resist layer, and a contact part with the bottom surface of the resist layer and the solder coating layer is formed by forming the solder coating layer in the region containing the gap in the solder coating layer formation step.SELECTED DRAWING: Figure 1 【課題】銅導体層の腐食を抑制しやすいプリント配線板の製造方法を提供すること。【解決手段】所定のパターン形状の銅導体層を有する基板上に、銅導体層の一部を覆うように所定のパターン形状のレジスト層を形成するレジスト層形成工程と、レジスト層で覆われていない銅導体層の表面を凹形状にエッチングするエッチング工程と、凹形状にエッチングされた銅導体層上に半田コート層を形成する半田コート層形成工程と、を有し、エッチング工程において、レジスト層で覆われていない銅導体層近傍のレジスト層の底面と接している銅導体層の一部を含む領域をエッチングすることで、レジスト層の下部に空隙を形成し、半田コート層形成工程において、空隙を含む領域に半田コート層を形成することで、レジスト層の底面と半田コート層との接触部を形成する、プリント配線板の製造方法。【選択図】図１