FIN END ISOLATION STRUCTURE FOR SEMICONDUCTOR DEVICE

• Main Author: LIAW JHON JHY
• Format: Patent
• Language: English; Japanese
• Published: 14.02.2022
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To provide a semiconductor device including an isolation structure for an end of a semiconductor fin, and a method for forming the same.SOLUTION: A semiconductor structure includes a substrate 202, and a first semiconductor fin 205C-1 and a second semiconductor fin 205C-2 extending from the substrate and aligned in a lengthwise direction along a first direction. The semiconductor structure further includes: an isolation structure 229 over the substrate and adjacent to sidewalls of the semiconductor fins; and first gate structures 240-2, 3 and second gate structures 240-5, 8 oriented in a lengthwise direction along a second direction generally perpendicular to the first direction. The first and second gate structures are disposed over the isolation structure. The first gate structures are disposed over the first semiconductor fin. The second gate structures are disposed over the second semiconductor fin. The semiconductor structure further includes a spacer layer 247 that is disposed on the sidewalls of the first gate structures and the sidewalls of the second gate structures and penetrates continuously through a trench between an end of the first semiconductor fin and an end of the second semiconductor fin.SELECTED DRAWING: Figure 2B 【課題】半導体フィンの端部の分離構成を備える半導体装置及びその形成方法を提供する。【解決手段】基板２０２と、基板から延び、第１の方向に沿って長手方向に並ぶ第１の半導体フィン２０５Ｃ－１及び第２の半導体フィン２０５Ｃ－２と、を備える半導体構造であって、基板上の半導体フィンの側壁に隣接する分離構造２２９と、第１の方向と略直交する第２の方向に沿って長手方向に配向する第１のゲート構造２４０－２、３及び第２のゲート構造２４０－５、８を含む。第１のゲート構造及び第２のゲート構造は、分離構造上に配置されている。第１ゲート構造は、第１半導体フィン上に配置され、第２のゲート構造は、第２の半導体フィン上に配置されている。半導体構造は、第１のゲート構造の側壁及び第２のゲート構造の側壁に配置され、第１の半導体フィンの端部と第２の半導体フィンの端部との間のトレンチを連続的に貫通するスペーサ層２４７をさらに含む。【選択図】図２Ｂ