MULTILAYER CERAMIC CIRCUIT BOARD AND POWER MODULE USING THE CERAMIC CIRCUIT BOARD

To provide a multilayer ceramic circuit board which is capable of effectively suppressing warp and distortion of a circuit board even after being multi-layered and of contributing to reduction of a development period and manufacturing costs more than a prior art, and a power module using the circuit...

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Bibliographic Details
Main Authors ITO HIROYUKI, OKISHIRO KENJI, KURITA FUMI, KANAMARU MASATOSHI, ADACHI YURI
Format Patent
LanguageEnglish
Japanese
Published 02.02.2022
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Summary:To provide a multilayer ceramic circuit board which is capable of effectively suppressing warp and distortion of a circuit board even after being multi-layered and of contributing to reduction of a development period and manufacturing costs more than a prior art, and a power module using the circuit board.SOLUTION: A multilayer ceramic circuit board according to the present invention has a configuration in which a plurality of ceramic insulation layers and a plurality of layers of an in-plane conductive circuit are layered by turns. In the respective layers of the in-plane conductive circuit, a plurality of conductive islands are dispersed and arranged in a grid layout shape so that an island of a sea-island structure regarding the adjacent ceramic insulation layers as a sea is formed, the prescribed conductive islands are connected by conductive bridges to form a desired in-plane conductive circuit, and positions of the conductive islands in the respective layers of the in-plane conductive circuits match one another when seen through in a main surface direction of the circuit board.SELECTED DRAWING: Figure 2A 【課題】多層化しても回路基板の反りやゆがみを効果的に抑制でき、かつ従来技術よりも開発期間の短縮や製造コストの削減に貢献する多層セラミックス回路基板、および該回路基板を用いたパワーモジュールを提供する。【解決手段】本発明に係る多層セラミックス回路基板は、複数のセラミックス絶縁層と複数層の面内導電回路とが交互に積層された構造を有しており、前記面内導電回路の各層では、隣接する前記セラミックス絶縁層を海と見立てた海島構造の島となるように複数の導電アイランドがグリッドレイアウト状に分散配設され、所定の前記導電アイランド同士が導電ブリッジで接続されて所望の面内導電回路が形成されており、かつ前記回路基板の主表面方向に透視したときに、前記面内導電回路の各層の前記導電アイランドの位置がそれぞれ合致していることを特徴とする。【選択図】図2A
Bibliography:Application Number: JP20200124391