SEMICONDUCTOR DEVICE

To provide a semiconductor device capable of improving reliability of a gate insulating layer.SOLUTION: A semiconductor device according to an embodiment comprises: a silicon carbide layer having a first surface and a second surface, the silicon carbide layer including a first silicon carbide region...

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Bibliographic Details
Main Authors SUZUKI TAKUMA, GOTO KAZUHISA, OBATA SUSUMU, OTA CHIHARU, KANIE SOZO
Format Patent
LanguageEnglish
Japanese
Published 27.01.2022
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Summary:To provide a semiconductor device capable of improving reliability of a gate insulating layer.SOLUTION: A semiconductor device according to an embodiment comprises: a silicon carbide layer having a first surface and a second surface, the silicon carbide layer including a first silicon carbide region of a first conductivity type, a second silicon carbide region of a second conductivity type between the first silicon carbide region and the first surface, a third silicon carbide region of the second conductivity type between the first silicon carbide region and the first surface, a fourth silicon carbide region of the first conductivity type between the second silicon carbide region and the first surface, a fifth silicon carbide region of the first conductivity type between the third silicon carbide region and the first surface, a sixth silicon carbide region of the second conductivity type located between the first silicon carbide region and the first surface and between the second silicon carbide region and the third silicon carbide region, and a crystal defect at least partially located in the sixth silicon carbide region; a gate electrode; a gate insulating layer located between the gate electrode and the sixth silicon carbide region; a first electrode on the first surface; and a second electrode on the second surface.SELECTED DRAWING: Figure 1 【課題】ゲート絶縁層の信頼性の向上が可能な半導体装置を提供する。【解決手段】実施形態の半導体装置は、第1の面と第2の面を有し、第1導電形の第1の炭化珪素領域と、第1の炭化珪素領域と第1の面との間の第2導電形の第2の炭化珪素領域と、第1の炭化珪素領域と第1の面との間の第2導電形の第3の炭化珪素領域と、第2の炭化珪素領域と第1の面との間の第1導電形の第4の炭化珪素領域と、第3の炭化珪素領域と第1の面との間の第1導電形の第5の炭化珪素領域と、第1の炭化珪素領域と第1の面との間に位置し、第2の炭化珪素領域と第3の炭化珪素領域との間の第2導電形の第6の炭化珪素領域と、少なくとも一部が第6の炭化珪素領域の中に位置する結晶欠陥と、を含む炭化珪素層と、ゲート電極と、ゲート電極と第6の炭化珪素領域の間に位置するゲート絶縁層と、第1の面上の第1の電極と、第2の面上の第2の電極と、を備える。【選択図】図1
Bibliography:Application Number: JP20200122515