SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVE DEVICE, VEHICLE, AND ELEVATOR

• Main Authors: KYOGOKU SHINYA, TANAKA KATSUHISA, IIJIMA RYOSUKE
• Format: Patent
• Language: English; Japanese
• Published: 21.01.2022
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To provide a semiconductor device capable of reducing a saturation current.SOLUTION: A semiconductor device according to an embodiment comprises: first trenches located at a first surface side of a silicon carbide layer so as to extend in a first direction; second and third trenches which are located in a second direction orthogonal to the first direction, with respect to the first trench, and which are adjacent to each other in the first direction; an n-type first silicon carbide region; a p-type second silicon carbide region between the first silicon carbide region and the first surface; an n-type third silicon carbide region between the second silicon carbide region and the first surface; a p-type fourth silicon carbide region located between the first silicon carbide region and the second trench; a p-type fifth silicon carbide region located between the first silicon carbide region and the third trench; gate electrodes in the respective first trenches; gate insulating layers; a first electrode partially located in the second trench; and a second electrode located at a second surface side. A part of the first silicon carbide region is located between the second trench and the third trench.SELECTED DRAWING: Figure 1 【課題】飽和電流の低減が可能な半導体装置を提供する。【解決手段】実施形態の半導体装置は、炭化珪素層の第１の面の側に位置し第１の方向に延びる第１のトレンチと、第１のトレンチに対して第１の方向に直交する第２の方向に位置し、第１の方向に隣り合う第２及び第３のトレンチと、ｎ型の第１の炭化珪素領域と、第１の炭化珪素領域と第１の面との間のｐ型の第２の炭化珪素領域と、第２の炭化珪素領域と第１の面との間のｎ型の第３の炭化珪素領域と、第１の炭化珪素領域と第２のトレンチとの間に位置するｐ型の第４の炭化珪素領域と、第１の炭化珪素領域と第３のトレンチとの間に位置するｐ型の第５の炭化珪素領域と、第１のトレンチの中のゲート電極と、ゲート絶縁層と、一部が第２のトレンチの中に位置する第１の電極と、第２の面の側に位置する第２の電極と、を備え、第１の炭化珪素領域の一部は第２のトレンチと第３のトレンチとの間に位置する。【選択図】図１