CONTROL DEVICE AND PROGRAM VERIFICATION METHOD

To provide a control device and a program verification method capable of suppressing an operational load when different keys are used for respective devices at a time of program startup during secure boot in an embedded system.SOLUTION: A control device 1 stores a verification target program, a plur...

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Bibliographic Details
Main Authors FUJII YASUHIRO, KATAOKA MIKIO, MORITA NOBUYOSHI, YANO TADASHI
Format Patent
LanguageEnglish
Japanese
Published 21.01.2022
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:To provide a control device and a program verification method capable of suppressing an operational load when different keys are used for respective devices at a time of program startup during secure boot in an embedded system.SOLUTION: A control device 1 stores a verification target program, a plurality of verification expected values related to verification of the verification target program, and registered verification expected value information 183 that identifies one of the verification expected values. The control device 1 verifies whether or not the verification target program is correct by using the registered verification expected value information 183.SELECTED DRAWING: Figure 1 【課題】組み込みシステムにおけるセキュアブートの際、プログラム起動時に装置ごとに異なる鍵を用いる場合の運用負荷を抑制できる制御装置およびプログラム検証方法を提供する。【解決手段】制御装置１は、検証対象プログラムと、検証対象プログラムの検証に係る複数の検証期待値と、検証期待値のうち１つを特定する登録済み検証期待値情報１８３とを記憶する。制御装置１は、登録済み検証期待値情報１８３を用いて、検証対象プログラムが正しいか否かを検証する。【選択図】図１
Bibliography:Application Number: JP20200117468