METHOD FOR MANUFACTURING WIRING BOARD

• Main Authors: MORI RENTARO, KONDO HARUKI, YANAGIMOTO HIROSHI, OKAMOTO KAZUAKI, KURODA KEIJI
• Format: Patent
• Language: English; Japanese
• Published: 13.01.2022
• Subjects: APPARATUS THEREFOR; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; CHEMISTRY; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; ELECTROFORMING; ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS; METALLURGY; PRINTED CIRCUITS; PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTIONOF COATINGS

To provide a method for manufacturing a wiring board having a wiring layer having a predetermined wiring pattern using a solid electrolytic film.SOLUTION: A base material with a seed layer is prepared. The base material with the seed layer includes an insulating base material having a main surface composed of a first region and a second region that is a region other than the first region, and a conductive seed layer provided on the first region. Subsequently, a conductive layer is formed on at least the second region, and a first treatment base material is obtained. Subsequently, an insulating layer is formed on the first treatment base material. Subsequently, the seed layer is exposed. Subsequently, a metal layer is formed on the surface of the seed layer. Here, a solid electrolytic film containing a solution containing metallic ions is arranged between the second treatment base material and an anode, and a voltage is applied between the anode and the seed layer while bringing the solid electrolytic film into pressure-contact with the seed layer. Then, the insulating layer and the conductive layer are removed.SELECTED DRAWING: Figure 1 【課題】固体電解質膜を用いて、所定の配線パターンの配線層を備える配線基板を製造する方法を提供する。【解決手段】まず、シード層付き基材を準備する。シード層付き基材は、第１の領域及び前記第１の領域以外の領域である第２の領域からなる主面を有する絶縁性基材と、前記第１の領域上に設けられた、導電性のシード層と、を含む。次に、少なくとも前記第２の領域上に導電層を形成して、第１処理基材を得る。次に、第１処理基材上に絶縁層を形成する。次に、前記シード層を露出させる。次に、前記シード層の表面に金属層を形成する。ここで、前記第２処理基材と陽極との間に、金属イオンを含む溶液を含有する固体電解質膜を配置し、前記固体電解質膜と前記シード層とを圧接させながら、前記陽極と前記シード層との間に電圧を印加する。その後、前記絶縁層及び前記導電層を除去する。【選択図】図１