CHARGE TRAP SPLIT GATE DEVICE AND METHOD OF MANUFACTURING THE SAME

To provide an integrated process for fabricating advanced logic components and memory components on the same semiconductor chip.SOLUTION: The split gate device includes: memory gates and select gates embedded side by side; a dielectric structure that has a first portion disposed between the memory g...

Full description

Saved in:
Bibliographic Details
Main Authors KIM UNSOON, FANG SHENQING, CHANG KUO TUNG, SAMEER S HADDAD, CHEN CHUN, RAMSBEY MARK
Format Patent
LanguageEnglish
Japanese
Published 16.12.2021
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:To provide an integrated process for fabricating advanced logic components and memory components on the same semiconductor chip.SOLUTION: The split gate device includes: memory gates and select gates embedded side by side; a dielectric structure that has a first portion disposed between the memory gate and a substrate and a second portion disposed along an inner sidewall of the select gate, separating the select gate from the memory gate; and a spacer formed on the select gate along an inner sidewall of the memory gate. Also, another form of embedded split gate device including high voltage and low voltage transistors is disclosed.SELECTED DRAWING: Figure 5 【課題】同じ半導体チップ上に高度論理構成要素及びメモリ構成要素を製作する集積プロセスを提供する。【解決手段】並んで埋め込まれたメモリゲートと選択ゲートと、メモリゲートと基板との間に配置される第1の部分と、選択ゲートの内部側壁に沿って配置される第2の部分とを有して、選択ゲートをメモリゲートから隔てる誘電体構造と、メモリゲートの内部側壁に沿って、選択ゲート上に形成されるスペーサとを備えるスプリットゲートデバイス。また、高電圧及び低電圧トランジスタを含む埋め込みスプリットゲートデバイスの別形態が開示される。【選択図】図5
Bibliography:Application Number: JP20210153727