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To make it possible to suppress rapid resistance change and downsize an arbitrary resistance value with a simple structure.SOLUTION: Analog resistance change elements 101, 102 each of which is constituted by an upper electrode, a lower electrode, and an oxide layer provided between the upper electro...
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Main Authors | , , , |
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Format | Patent |
Language | English Japanese |
Published |
13.09.2021
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Subjects | |
Online Access | Get full text |
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Summary: | To make it possible to suppress rapid resistance change and downsize an arbitrary resistance value with a simple structure.SOLUTION: Analog resistance change elements 101, 102 each of which is constituted by an upper electrode, a lower electrode, and an oxide layer provided between the upper electrode and the lower electrode and in which a resistance component R1 and a capacitance component C1 are connected in parallel and a resistance component R2 and a capacitance component C2 are connected in parallel are connected in series, which enables existing analog resistance change elements to be used as they are. A parallel circuit including a resistance component and a capacitance component may be connected to an analog resistance element in a form of a resistance component and a capacitance component connected in parallel. Voltage application to this circuit system enables change of a resistance value. In a resistance lowering process, influence of the capacitance components C1, C2 emerges and distribution of voltage according to a capacitance ratio lowers voltage, which suppresses rapid resistance reduction.SELECTED DRAWING: Figure 1
【課題】急激な抵抗変化を抑制でき、任意の抵抗値を簡単な構造で小型化できること。【解決手段】上部電極と、下部電極と、上部電極および下部電極間に設けられる酸化物層とにより、抵抗成分R1と容量成分C1,抵抗成分R2と容量成分C2が並列接続された形のアナログ抵抗変化素子101,102、を二つ直列接続することで既存のアナログ抵抗変化素子をそのまま利用できる。また、抵抗成分と容量成分が並列接続された形のアナログ抵抗素子に対し、抵抗成分と容量成分を有する並列回路を接続してもよい。この回路系に対する電圧印加により、抵抗値が変化可能であり、低抵抗化過程において、容量成分C1,C2の影響が現れ、電圧が容量の比率に応じて分配されることで電圧が低下して、急激な抵抗減少を抑制する。【選択図】図1 |
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Bibliography: | Application Number: JP20200032407 |