SEMICONDUCTOR DEVICE

To reduce a rate of resistance variation due to aging of a metal layer used in a resistive element.SOLUTION: A resistive element has a first conductive layer formed on a first interlayer insulating layer on a semiconductor substrate, a second conductive layer formed on a second interlayer insulating...

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Bibliographic Details
Main Authors HASHIMOTO CHIEMI, YAYAMA KOSUKE, TAWARA HIDEKAZU
Format Patent
LanguageEnglish
Japanese
Published 02.09.2021
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Summary:To reduce a rate of resistance variation due to aging of a metal layer used in a resistive element.SOLUTION: A resistive element has a first conductive layer formed on a first interlayer insulating layer on a semiconductor substrate, a second conductive layer formed on a second interlayer insulating layer different from the first interlayer insulating layer, and a conductor with a repeating pattern of interlayer conductive layers connecting the first conductive layer and the second conductive layer, and the second conductive layer has a resistance fluctuation characteristic that is opposite to a resistance fluctuation characteristic of the first conductive layer after heat treatment.SELECTED DRAWING: Figure 3 【課題】抵抗素子に用いられる金属層の時効による抵抗値変動率を低減させる。【解決手段】抵抗素子は、半導体基板上の第1の層間絶縁層に形成される第1導電層と、前記第1の層間絶縁層とは異なる第2の層間絶縁層に形成される第2導電層と、第1導電層と第2導電層とを接続する層間導電層との繰り返しパターンを有する導体と、を備え、第2導電層が、第1導電層の熱処理後の抵抗値変動特性に対して逆の抵抗値変動特性を有する。【選択図】図3
Bibliography:Application Number: JP20200024173