WAFER CONVEYANCE UNIT AND WAFER CONVEYANCE METHOD

• Main Authors: SHIMASE AKIRA, IKESU MASATAKA, ISHIZUKA TOSHIMICHI
• Format: Patent
• Language: English; Japanese
• Published: 10.08.2021
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To properly hold a wafer during conveyance without interfering with each function of a semiconductor failure analysis device.SOLUTION: A failure analysis unit 10 is a wafer conveyance unit that conveys a wafer W while holding the wafer in a semiconductor failure analysis device, and includes: a mounting stand 11 that secures a wafer W at a predetermined observation position; and a wafer chuck 12 that conveys the wafer W to the observation position while holding the wafer. The wafer chuck 12 has a plurality of holding members (protruding sections 12x, 12x, 12y, 12y) provided so as to face the side surface of the wafer W, and holds the wafer W through the gripping of the periphery of the wafer W by the plurality of holding members.SELECTED DRAWING: Figure 1 【課題】半導体故障解析装置の各機能を妨げることなく、搬送中のウェハを適切に保持すること。【解決手段】故障解析ユニット１０は、半導体故障解析装置においてウェハＷを保持しながら搬送するウェハ搬送ユニットであって、所定の観察位置にウェハＷを固定する載置台１１と、観察位置までウェハＷを保持しながら搬送するウェハチャック１２と、を備え、ウェハチャック１２は、ウェハＷの側面と対向するように設けられた複数の保持部材（突出部１２ｘ，１２ｘ，１２ｙ，１２ｙ）を有し、複数の保持部材によってウェハＷの周部を挟持することによりウェハＷを保持する。【選択図】図１