SEMICONDUCTOR DEVICE

• Main Authors: IKEDA YOSHINARI, HORI MOTOHITO, NAKAJIMA TSUNEHIRO, HIRAO AKIRA
• Format: Patent
• Language: English; Japanese
• Published: 24.06.2021
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To provide a small semiconductor device including a semiconductor element with excellent operation performance.SOLUTION: A semiconductor device 1 includes a semiconductor element 2 provided between a conductive layer 3 and a conductive layer 4 that face each other. Each of the conductive layer 3 and the conductive layer 4 is connected electrically to a positive electrode 2a and a negative electrode 2b of the semiconductor element 2. The conductive layer 3 and the conductive layer 4 are provided with a positive electrode terminal 3a and a negative electrode terminal 4a, respectively, on a direction D1 side. A control wire 6 electrically connected to a control electrode 2c of the semiconductor element 2 is drawn to the outside in a direction D2 opposite to the direction D1 of the conductive layer 3 and the conductive layer 4, and connected to a control terminal 8 positioning outside the conductive layer 3 and the conductive layer 4. An end part 8a of the control terminal 8 is arranged beside the positive electrode terminal 3a and the negative electrode terminal 4a. The influence of the electromagnetic field of main current 9b flowing from the positive electrode terminal 3a to the negative electrode terminal 4a on control current 9a flowing to the control terminal 8 is suppressed and the controllability of the semiconductor element 2 is increased.SELECTED DRAWING: Figure 1 【課題】半導体素子の動作性能に優れる小型の半導体装置を実現する。【解決手段】半導体装置１は、対向する導体層３と導体層４との間に設けられた半導体素子２を含む。導体層３及び導体層４にそれぞれ、半導体素子２の正極電極２ａ及び負極電極２ｂが電気的に接続される。導体層３及び導体層４には、方向Ｄ１側にそれぞれ、正極端子３ａ及び負極端子４ａが設けられる。半導体素子２の制御電極２ｃと電気的に接続される制御配線６が、導体層３及び導体層４の方向Ｄ１と逆の方向Ｄ２の外側に引き出され、導体層３及び導体層４の外側に位置する制御端子８と接続される。制御端子８の端部８ａは、正極端子３ａ及び負極端子４ａと並設される。正極端子３ａから負極端子４ａに流れる主電流９ｂの電磁界による制御端子８に流れる制御電流９ａへの影響を抑え、半導体素子２の制御性を高める。【選択図】図１