ELECTRONIC CONTROL DEVICE

To manage a synchronization even outside an operating system operating section.SOLUTION: An ECU 1 includes CPU cores 11 to 13. The first CPU core 11 is a master core, and the second CPU core 12 and the third CPU core 13 are each a slave core. The first CPU core 11 executes necessary processes for op...

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Bibliographic Details
Main Authors KASHIWABARA KAZUTERU, KASASHIMA TATSUYA
Format Patent
LanguageEnglish
Japanese
Published 03.06.2021
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:To manage a synchronization even outside an operating system operating section.SOLUTION: An ECU 1 includes CPU cores 11 to 13. The first CPU core 11 is a master core, and the second CPU core 12 and the third CPU core 13 are each a slave core. The first CPU core 11 executes necessary processes for operating an application on the second CPU core 12 and on the third CPU core 13. The first CPU core 11 changes, for each of the CPU cores 11 to 13, whether or not to execute a barrier synchronization in both inside and outside an OS operating section where an OS is operating using involved core identification data 24 managed by the first CPU core 11.SELECTED DRAWING: Figure 1 【課題】オペレーティングシステム動作区間外においても同期を管理する。【解決手段】ＥＣＵ１は、ＣＰＵコア１１〜１３を備える。第１ＣＰＵコア１１は、マスタコアであり、第２ＣＰＵコア１２および第３ＣＰＵコア１３はスレーブコアである。第１ＣＰＵコア１１は、第２ＣＰＵコア１２および第３ＣＰＵコア１３上でアプリケーションを動作させるために必要な処理を実行する。第１ＣＰＵコア１１は、ＯＳを動作させているＯＳ動作区間の内と外の両方において、第１ＣＰＵコア１１が管理する参加コア識別データ２４を用いて、ＣＰＵコア１１〜１３のそれぞれについてバリア同期を実行するか否かを切り替える。【選択図】図１
Bibliography:Application Number: JP20190213259