APPARATUS, METHOD, AND SYSTEM FOR PROCESSOR NON-WRITE-BACK CAPABILITY
To provide a method for allowing software to selectively disable non-write-back lock accesses.SOLUTION: A hardware processor 100 includes: a plurality of logical processors; a control register 110 comprising a non-write-back lock disable bit; a cache 128 shared by the plurality of logical processors...
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Main Authors | , , , |
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Format | Patent |
Language | English Japanese |
Published |
08.04.2021
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Subjects | |
Online Access | Get full text |
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