SEQUENTIAL COMPARISON AD CONVERTER

• Main Author: KONNO SHOTA
• Format: Patent
• Language: English; Japanese
• Published: 01.04.2021
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRICITY

To provide a sequential comparison AD converter that improves differential nonlinearity error in a small area even when elements that make up a DA converter vary.SOLUTION: A sequential comparison AD converter 100 includes a comparison circuit 2 that compares an input analog signal with a reference signal, a sequential comparison register 33 that outputs an output digital signal composed of a first bit signal and a second bit signal, a calculation unit 34 that outputs a third bit signal and a fourth bit signal, a first bit DA converter 4 that converts the third bit signal to a first analog signal, a second bit DA converter 5 that converts the fourth bit signal to a second analog signal, and a reference signal generation unit 6 that generates a reference signal on the basis of the first analog signal and the second analog signal. The calculation unit 34 outputs the third bit signal and the fourth bit signal on the basis of a fifth bit signal which is determined before a control signal that controls whether to perform the calculation on the output digital signal of the second bit signal transitions to a first logical value.SELECTED DRAWING: Figure 1 【課題】ＤＡ変換器を構成する素子にばらつきがある場合にも、小面積で、微分非直線性誤差を改善する逐次比較ＡＤ変換器を提供する。【解決手段】逐次比較ＡＤ変換器１００は、入力アナログ信号と参照信号を比較する比較回路２と、第１ビット信号と第２ビット信号とで構成される出力デジタル信号を出力する逐次比較レジスタ３３と、第３ビット信号と第４ビット信号とを出力する演算部３４と、第３ビット信号を第１アナログ信号に変換する第１ビットＤＡ変換器４と、第４ビット信号を第２アナログ信号に変換する第２ビットＤＡ変換器５と、第１アナログ信号と第２アナログ信号とに基づいて、参照信号を生成する参照信号生成部６と、を備える。演算部３４は、第２ビット信号のうち、出力デジタル信号に対して演算を行うか否かを制御する制御信号が第１論理値に遷移するまでに判定された、第５ビット信号に基づいて、第３ビット信号と第４ビット信号とを出力する。【選択図】図１