SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND SEMICONDUCTOR LIGHT-EMITTING DEVICE
To provide a semiconductor light-emitting element and the like having high heat dissipation.SOLUTION: A semiconductor light-emitting element 21 comprises: a semiconductor laminate 30 that includes an n-type layer 32, a p-type layer 36, and an n exposed part 30e; a p wiring electrode layer 42 that is...
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Main Authors | , , , , , |
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Format | Patent |
Language | English Japanese |
Published |
04.03.2021
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Subjects | |
Online Access | Get full text |
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Summary: | To provide a semiconductor light-emitting element and the like having high heat dissipation.SOLUTION: A semiconductor light-emitting element 21 comprises: a semiconductor laminate 30 that includes an n-type layer 32, a p-type layer 36, and an n exposed part 30e; a p wiring electrode layer 42 that is arranged on the p-type layer 36; an isolation layer 44 that continuously covers an inner surface 30s of the n exposed part 30e and a part of an upper part of the p wiring electrode layer 42 and has an opening part 44a; an n wiring electrode layer 46 that contacts with the n-type layer 32 in the opening part 44a and is arranged above the p-type layer 36 and the p wiring electrode layer 42 via the isolation layer 44; and a first n connection member 51. The first n connection member 51 is a bump made of an alloy composed of one of Au, Ag, Al, and Cu or a combination thereof and is connected with the n wiring electrode layer 46 in a first n terminal area 51r. The n wiring electrode layer 46 and the p-type layer 36 are arranged below the first n terminal area 51r in a cross section parallel to a lamination direction of the semiconductor laminate 30.SELECTED DRAWING: Figure 2A
【課題】放熱性が高い半導体発光素子等を提供する。【解決手段】半導体発光素子21は、n型層32と、p型層36とを有する半導体積層体30であって、n露出部30eを有する半導体積層体30と、p型層36上に配置されたp配線電極層42と、n露出部30eの内側面30sと、p配線電極層42の上方の一部とを連続的に覆い、開口部44aを有する絶縁層44と、開口部44aにおいてn型層32に接し、絶縁層44を介してp型層36及びp配線電極層42の上方に配置されたn配線電極層46と、第1のn接続部材51とを有し、第1のn接続部材51は、Au、Ag、Al、Cuのいずれか、又は、それらの組み合わせからなる合金で構成されるバンプであり、第1のn端子領域51rにおいてn配線電極層46と接続され、半導体積層体30の積層方向に平行な断面において、第1のn端子領域51rの下方に、n配線電極層46及びp型層36が配置される。【選択図】図2A |
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Bibliography: | Application Number: JP20200202203 |