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To provide a high resistivity single crystal semiconductor support structure used for manufacturing a SOI structure because an electric charge inversion layer or a charge storage layer is easily formed in a high resistance semiconductor substrate on a boundary between a BOX and a support substrate,...
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Main Authors | , , , |
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Format | Patent |
Language | English Japanese |
Published |
04.03.2021
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Subjects | |
Online Access | Get full text |
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Summary: | To provide a high resistivity single crystal semiconductor support structure used for manufacturing a SOI structure because an electric charge inversion layer or a charge storage layer is easily formed in a high resistance semiconductor substrate on a boundary between a BOX and a support substrate, an effective resistance rate of the substrate is deteriorated, and a parasitic power loss or a non-linearity of a device occurs.SOLUTION: A support structure (a silicon-on-insulator structure 30) comprises an intermediate semiconductor layer 40 provided between a single crystal semiconductor supporting substrate 32 and an embedded oxide layer 34. The intermediate semiconductor layer includes: a polycrystalline structure, an amorphous structure, a nano crystal structure, or a single crystal structure, and contains a material selected from a group formed by Si1-xGex, Si1-xCx, Si1-x-yGexSny, Si1-x-y-zGexSnyCz, Ge1-xSnx, group IIIA nitride, metal oxide, and an arbitrary combinations of them.SELECTED DRAWING: Figure 3
【課題】高抵抗半導体基板では、BOXと支持基板との界面で電荷反転層や電荷蓄積層が形成されやすく、基板の有効抵抗率が低下し、寄生電力損失、デバイスの非線形性が生じる。SOI構造の製造に利用される高抵抗率単結晶半導体支持構造を提供する。【解決手段】支持構造(シリコンオンインシュレータ構造30)は、単結晶半導体支持基板32と埋め込み酸化物層34との間に設けられた中間半導体層40を備えている。中間半導体層は、多結晶構造、アモルファス構造、ナノ結晶構造または単結晶構造を有し、Si1−xGex、Si1−xCx、Si1−x−yGexSny、Si1−x−y−zGexSnyCz、Ge1−xSnx、IIIA族窒化物、金属酸化物およびこれらの任意の組合せから成る群から選択される材料を含む。【選択図】図3 |
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Bibliography: | Application Number: JP20200172396 |