CIRCUIT BOARD

To make it possible to reduce the maximum principal stress.SOLUTION: A circuit board has a through hole into which a press-fit terminal part is inserted in the depth direction, the circuit board including: an inner wall land provided on an inner wall of the through hole; and a plurality of inner lay...

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Bibliographic Details
Main Authors YAMASHITA SHIRO, KAWAKITA SHINYA, SHIGYO TOSHIKAZU
Format Patent
LanguageEnglish
Japanese
Published 22.02.2021
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Summary:To make it possible to reduce the maximum principal stress.SOLUTION: A circuit board has a through hole into which a press-fit terminal part is inserted in the depth direction, the circuit board including: an inner wall land provided on an inner wall of the through hole; and a plurality of inner layer lands that are provided in an inner layer of the circuit board, are planes in approximately parallel with a mounting surface of the circuit board, and are in contact with the inner wall land. The inner wall land includes a first region that is in contact with the press-fit terminal part and a second region that is not in contact with the press-fit terminal part. A first inner layer land, which is an inner layer land of the plurality of inner layer lands that is disposed on the inner wall land's surface in the first region, is wider than a second inner layer land, which is an inner layer land that is disposed on the inner wall land's surface in the second region.SELECTED DRAWING: Figure 3 【課題】最大主応力を小さくできる。【解決手段】回路基板は、プレスフィット端子部が深さ方向に挿入されたスルーホールを有する回路基板であって、スルーホールの内壁に設けられた内壁ランドと、回路基板の内層に設けられ、回路基板の実装面と略平行な平面であり、内壁ランドと接する複数の内層ランドと、を有し、内壁ランドは、プレスフィット端子部と接する第1領域と、プレスフィット端子部と接しない第2領域とがあり、複数の内層ランドのうち、内壁ランドの第1領域と同じ面に配される内層ランドである第1内層ランドは、内壁ランドの第2領域と同じ面に配される内層ランドである第2内層ランドより広い。【選択図】図3
Bibliography:Application Number: JP20190144052