CIRCUIT ARRANGEMENT, DETERMINATION METHOD FOR CIRCUIT ARRANGEMENT, AND ELECTRONIC APPARATUS

• Main Authors: YAMADA TOSHIMICHI, MUTO KOTA
• Format: Patent
• Language: English; Japanese
• Published: 29.10.2020
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

To provide a circuit arrangement that avoids complicated configuration while preventing erroneous determination of disconnection.SOLUTION: A circuit arrangement includes: a packet output circuit that amplifies a packet current to output it to a USB standard bus; a detection circuit that detects whether an amplitude level of a packet transmitted to a bus exceeds a disconnection detection level over a predetermined period of time; a determination circuit that determines, when, of SOF packets output by the packet output circuit, an EOP current is lower than a current other than the EOP, and a detection circuit detects that an amplitude level of the EOP exceeds the disconnection detection level, that a device connected to the bus has been disconnected.SELECTED DRAWING: Figure 3 【課題】切断の誤判定を防止しつつ、構成の複雑化を回避する。【解決手段】回路装置は、パケットの電流を増幅して、ＵＳＢ規格のバスに出力するパケット出力回路と、バスに送信されたパケットの振幅レベルが所定の期間にわたって切断検出レベルを超えたか否かを検出する検出回路と、パケット出力回路によって出力されるＳＯＦパケットのうち、ＥＯＰの電流を、ＥＯＰ以外の電流よりも低くし、ＥＯＰの振幅レベルが切断検出レベルを超えたと検出回路によって検出された場合に、バスに接続されていた装置が切断されたと判定する判定回路と、を含む。【選択図】図３