MEMORY DEVICE

• Main Authors: OSADA YOSHIAKI, HATSUDA KOSUKE
• Format: Patent
• Language: English; Japanese
• Published: 24.09.2020
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INFORMATION STORAGE; PHYSICS; SEMICONDUCTOR DEVICES; STATIC STORES

To improve characteristics of a memory device.SOLUTION: A memory device of an embodiment includes a memory cell MC connected between a first wiring WL and a second wiring BL and including a variable resistive element 1, and a write circuit 141 including a current source circuit 300 and a voltage source circuit 310 and writing data into the memory cell MC using a write pulse. The write circuit 141 supplies the write pulse to the memory cell MC using the current source circuit 300 during a first period from a first time at which supply of the write pulse is started to a second time, and supplies the write pulse to the memory cell MC using the voltage source circuit 310 during a second period from a third time to a fourth time at which supply of the write current is stopped.SELECTED DRAWING: Figure 7 【課題】メモリデバイスの特性を向上する。【解決手段】実施形態のメモリデバイスは、第１の配線ＷＬと第２の配線ＢＬとの間に接続され、可変抵抗素子１を含むメモリセルＭＣと、電流源回路３００と電圧源回路３１０とを含み、書き込みパルスを用いてメモリセルＭＣにデータを書き込む書き込み回路１４１と、を含む。書き込み回路１４１は、書き込みパルスの供給の開始の第１の時刻から第２の時刻までの第１の期間において、電流源回路３００を用いて、書き込みパルスをメモリセルＭＣに供給し、第３の時刻から前記書き込み電流の供給の停止の第４の時刻までの第２の期間において、電圧源回路３１０を用いて、書き込みパルスをメモリセルＭＣに供給する。【選択図】 図７