MULTILAYER WIRING BOARD

• Main Authors: KOYA SHIGEKI, KONDO MASAO, SASAKI KENJI
• Format: Patent
• Language: English; Japanese
• Published: 17.09.2020
• Subjects: CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS; PRINTED CIRCUITS

To provide a multilayer wiring board capable of suppressing variations in temperature rise in an operation region of a transistor.SOLUTION: An opening in which a part of a conductor pattern is exposed and which is long in one direction is provided in a protective film covering the conductor pattern of an uppermost conductor layer in a multilayer wiring board. A first via conductor extends downward from an uppermost conductor pattern and reaches at least a conductor pattern of a second layer. A second via conductor extends downward from a conductor pattern of the second layer or a third layer and reaches a conductor pattern which is lower for at least one layer. In a planar view, the first via conductor and the opening are partially overlapped. At least two of multiple second via conductors are disposed at positions holding the opening therebetween. In the multiple second via conductors holding the opening therebetween, a difference between a narrowest interval from the second via conductor disposed at one side of the opening to the opening and a narrowest interval from the second via conductor disposed at the other side to the opening is smaller than a narrowest interval from the multiple second via conductors to the opening.SELECTED DRAWING: Figure 1 【課題】トランジスタの動作領域の温度上昇のばらつきを抑制することができる多層配線基板を提供する。【解決手段】多層配線基板の最も上の導体層の導体パターンを覆う保護膜に、導体パターンの一部を露出させる一方向に長い開口が設けられている。第１ビア導体が、最も上の導体パターンから下方に延び、少なくとも２層目の導体パターンまで達する。第２ビア導体が、２層目または３層目の導体パターンから下方に延び、少なくとも１層分下の導体パターンまで達する。平面視において、第１ビア導体と開口とが部分的に重なっている。複数の第２ビア導体のうち少なくとも２つは、開口を挟む位置に配置されている。開口を挟む複数の第２ビア導体のうち、開口の一方の側に配置された第２ビア導体から開口までの最も狭い間隔と、他方の側に配置された第２ビア導体から開口までの最も狭い間隔との差が、複数の第２ビア導体から開口までの最も狭い間隔より小さい。【選択図】図１