SEMICONDUCTOR DEVICE

To provide an active matrix type display device in which the arrangement of a pixel electrode formed on a pixel unit, a scan line (gate line) and a data line is made to be suitable, and which has a pixel structure achieving the high opening ratio without increasing the number of masks and the number...

Full description

Saved in:
Bibliographic Details
Main Author YAMAZAKI SHUNPEI
Format Patent
LanguageEnglish
Japanese
Published 30.07.2020
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:To provide an active matrix type display device in which the arrangement of a pixel electrode formed on a pixel unit, a scan line (gate line) and a data line is made to be suitable, and which has a pixel structure achieving the high opening ratio without increasing the number of masks and the number of steps.SOLUTION: A first wire 102 provided via a first insulation film between a semiconductor film 107 and a substrate is superimposed on the semiconductor film and is used as a light shielding film. A second insulation film used as a gate insulation film is formed on the semiconductor film, and a gate electrode 133 and a second wire 134 are formed on the second insulating film. The first and second wires intersect with each other via the first and second insulation films. A third insulation film as an interlayer dielectric is formed on the upper layer of the second wire, and a pixel electrode 147 is formed thereon. The pixel electrode can be formed in an overlapping manner on the first wire and the second wire. The area of the pixel electrode can be increased on a reflection type display device.SELECTED DRAWING: Figure 1 【課題】画素部に形成される画素電極や走査線(ゲート線)及びデータ線の配置を適したものとして、かつ、マスク数及び工程数を増加させることなく高い開口率を実現した画素構造を有するアクティブマトリクス型表示装置を提供することを目的とする。【解決手段】半導体膜107と基板との間に第1の絶縁膜を介して設けられた第1の配線102を、該半導体膜と重ねて設け、遮光膜として用いる。さらに半導体膜上にゲート絶縁膜として用いる第2の絶縁膜を形成し、当該第2の絶縁膜上にゲート電極133と第2の配線134を形成する。第1及び第2の配線は、第1及び第2の絶縁膜を介して交差する。第2の配線の上層には、層間絶縁膜として第3の絶縁膜を形成し、その上に画素電極147を形成する。画素電極は、第1の配線及び第2の配線とオーバーラップさせて形成することが可能であり、反射型の表示装置において画素電極の面積を大型化できる。【選択図】図1
Bibliography:Application Number: JP20200034854