SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

• Main Authors: KYOGOKU SHINYA, IIJIMA RYOSUKE
• Format: Patent
• Language: English; Japanese
• Published: 27.07.2020
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To provide a semiconductor device and a method of manufacturing the same capable of reducing an on-resistance.SOLUTION: According to an embodiment, a semiconductor device includes first to fourth semiconductor regions, a first electrode, and a first insulating film. The first semiconductor region includes first and second subregions and has a first conductivity type. The second semiconductor region has the first conductivity type. The third semiconductor region is provided between the first and second semiconductor regions and has a second conductivity type. The third semiconductor region includes a third subregion, and a fourth subregion located between the first and third subregions. The first electrode is separated from the second subregion, and the second and third semiconductor regions. The first insulating film is provided between the second and third semiconductor regions and the first electrode, and between the second subregion and the first electrode, and is in contact with the third subregion. The fourth semiconductor region includes a portion provided between the first insulating film and the fourth subregion, and has the first conductivity type. An impurity concentration in the fourth semiconductor region is higher than that of the first subregion.SELECTED DRAWING: Figure 1 【課題】オン抵抗を低減できる半導体装置及びその製造方法を提供する。【解決手段】実施形態によれば、半導体装置は、第１〜第４半導体領域、第１電極及び第１絶縁膜を含む。第１半導体領域は、第１、第２部分領域を含み第１導電形である。第２半導体領域は第１導電形である。第３半導体領域は、第１、第２半導体領域との間に設けられ第２導電形である。第３半導体領域は、第３部分領域と、第１、第３部分領域との間に位置する第４部分領域と、を含む。第１電極は、第２部分領域、第２、第３半導体領域から離れる。第１絶縁膜は、第２、第３半導体領域と第１電極との間、及び、第２部分領域と第１電極との間に設けられ第３部分領域と接する。第４半導体領域は、第１絶縁膜と第４部分領域との間に設けられた部分を含み第１導電形である。第４半導体領域における不純物濃度は、第１部分領域よりも高い。【選択図】図１