VIA WIRING FORMING SUBSTRATE, VIA WIRING FORMING SUBSTRATE MANUFACTURING METHOD, AND SEMICONDUCTOR CHIP MOUNTING METHOD

• Main Author: KURIHARA HIROYUKI
• Format: Patent
• Language: English; Japanese
• Published: 04.06.2020
• Subjects: BASIC ELECTRIC ELEMENTS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS; PRINTED CIRCUITS; SEMICONDUCTOR DEVICES

To provide a via wiring forming substrate which can simultaneously mount semiconductor chips having different heights without the need to make a columnar electrical connector in advance, a manufacturing method thereof, and a semiconductor mounting component manufactured using the same.SOLUTION: A via wiring formation substrate 1 for mounting at least one semiconductor chip includes a support substrate 11, a peelable adhesive layer 12 provided on the support substrate, and an insulating layer 15 provided on the peelable adhesive layer, and via wiring forming vias 17 corresponding to a plurality of connection terminals of the semiconductor chip and capable of forming via wirings connected to the connection terminals are formed so as to penetrate only the insulating layer without displacement in the insulating layer, and the via wiring forming via is a straight via having a diameter of 15 μm to 70 μm, and the positional accuracy is photolithographic accuracy.SELECTED DRAWING: Figure 1 【課題】柱状の電気コネクタを予め作る必要がなく、高さの異なる半導体チップも同時に実装できるビア配線形成用基板及びその製造方法並びにこれを用いて製造した半導体実装部品を提供する。【解決手段】少なくとも一つの半導体チップを実装するためのビア配線形成用基板１であって、サポート基板１１と、前記サポート基板上に設けられた剥離可能接着剤層１２と、前記剥離可能接着剤層上に設けられた絶縁層１５と、を具備し、前記絶縁層には、前記半導体チップの複数の接続端子のそれぞれに対応し且つ前記接続端子と接続するビア配線を形成可能なビア配線形成用ビア１７が前記絶縁層のみを位置ずれなしに貫通して形成されており、前記ビア配線形成用ビアは、直径が１５μｍ〜７０μｍのストレートビアであり、位置精度がフォトリソグラフィー精度である。【選択図】図１