SEMICONDUCTOR DEVICE

To improve the reliability of a semiconductor device.SOLUTION: A semiconductor device PKG1 includes a wiring board SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring board SUB1, and a lid LD made of a metal plate covering the semiconductor chip CHP1 and...

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Bibliographic Details
Main Authors KINOSHITA YOSHIHIRO, SAKATA KENJI, KATSURA YOSUKE, AKIBA TOSHIHIKO
Format Patent
LanguageEnglish
Japanese
Published 09.01.2020
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:To improve the reliability of a semiconductor device.SOLUTION: A semiconductor device PKG1 includes a wiring board SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring board SUB1, and a lid LD made of a metal plate covering the semiconductor chip CHP1 and the wiring board SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC thicker than the thickness of the semiconductor chip CHP1 is arranged in a notch 4d1 provided in the lid LD, and is exposed from the lid LD.SELECTED DRAWING: Figure 3 【課題】半導体装置の信頼性を向上させる。【解決手段】半導体装置ＰＫＧ１は、配線基板ＳＵＢ１と、配線基板ＳＵＢ１の上面２ｔに搭載された半導体チップＣＨＰ１およびコンデンサＣＤＣと、半導体チップＣＨＰ１および配線基板ＳＵＢ１を覆う金属板からなるリッドＬＤと、を有する。半導体チップＣＨＰ１は、導電性の接着層を介してリッドＬＤに接着されており、半導体チップＣＨＰ１の厚さよりも厚いコンデンサＣＤＣは、リッドＬＤに設けられた切欠き部４ｄ１に配置され、リッドＬＤから露出している。【選択図】図３
Bibliography:Application Number: JP20180122161