WIRING BOARD, MANUFACTURING METHOD THEREOF, AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE

• Main Authors: SATO JUNJI, FUKASE KATSUYA
• Format: Patent
• Language: English; Japanese
• Published: 12.12.2019
• Subjects: CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS; PRINTED CIRCUITS

To provide a wiring board that can suppress warpage when a semiconductor chip is mounted, a manufacturing method thereof, and a manufacturing method of a semiconductor package.SOLUTION: A wiring board 1 has a first surface 200A and a second surface 200B and includes a wiring member 200 having a plurality of wiring layers 201, 204, and 207 between the first surface 200A and the second surface 200B, and a carrier 300 bonded to the first surface 200A via an adhesive 400 and having a plurality of layers 301 to 303 of different thermal expansion coefficients. The pitch of the wires included in the plurality of wiring layers 201, 204, and 207 is smaller on the second surface 200B side than on the first surface 200A side. The direction in which the wiring member 200 warps when heated and the direction in which the carrier 300 warps are opposite to each other.SELECTED DRAWING: Figure 5 【課題】半導体チップを実装する際の反りを抑制することができる配線基板、配線基板の製造方法及び半導体パッケージの製造方法を提供する。【解決手段】配線基板１は、第１の面２００Ａ及び第２の面２００Ｂを備え、第１の面２００Ａと第２の面２００Ｂとの間に複数の配線層２０１、２０４、２０７を有する配線部材２００と、接着剤４００を介して第１の面２００Ａに接着され、互いに熱膨張係数が異なる複数の層３０１〜３０３を有するキャリア３００と、を有する。複数の配線層２０１、２０４、２０７に含まれる配線のピッチは、第１の面２００Ａ側よりも第２の面２００Ｂ側で狭くなっている。加熱されたときに配線部材２００が反ろうとする方向とキャリア３００が反ろうとする方向とが逆向きである。【選択図】図５