RANDOMIZER AND SEMICONDUCTOR MEMORY DEVICE

• Main Authors: KOGANEI YOHEI, NAGAI YUJI, ATAMI TAKESHI, KUROSAWA YASUHIKO
• Format: Patent
• Language: English; Japanese
• Published: 07.11.2019
• Subjects: BASIC ELECTRONIC CIRCUITRY; CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; ELECTRICITY; PHYSICS; PULSE TECHNIQUE

To enhance reliability for data.SOLUTION: A randomizer according to an embodiment of the present invention has a first pseudo random number generator, a second pseudo random number generator, and a logic circuit. The first pseudo random number generator generates a plurality of first pseudo random number sequences each having an N1 bit length. The second pseudo random number generator generates a second random number sequence having an N2 bit length (N2>N1). A seed of the second pseudo random number generator is formed of a plurality of third pseudo random number sequences. Each of the third pseudo random number sequences has a bit length of N3 (1<N3<N1) and is a part of each of the first pseudo random number sequences. The logic circuit randomizes a data sequence input from the outside, based on the second pseudo random number sequence.SELECTED DRAWING: Figure 11 【課題】データに対する信頼性を高めること。【解決手段】実施形態にかかるランダマイザは、第１擬似乱数生成器と、第２擬似乱数生成器と、ロジック回路とを備え、第１擬似乱数生成器は、それぞれがＮ１ビット長である複数の第１擬似乱数列を生成し、第２擬似乱数生成器は、Ｎ２ビット長（ただし、Ｎ２＞Ｎ１）である第２擬似乱数列を生成し、第２擬似乱数生成器のシードは複数の第３擬似乱数列から構成され、それぞれの第３擬似乱数列は、ビット長がＮ３（ただし、１＜Ｎ３＜Ｎ１）で、かつ、それぞれの第１擬似乱数列の一部であり、ロジック回路は、第２擬似乱数列に基づいて、外部から入力されたデータ列をランダマイズする。【選択図】図１１