POWER BUFFER DEVICE
To provide a technology that can reduce the size of a capacitor in a power buffer device.SOLUTION: An active buffer circuit 8 controls such that, for a passive capacitor Cp and an active capacitor Ca connected in series to a DC link 6 of a power conditioner, the voltage of the active capacitor Ca be...
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Main Authors | , , , , |
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Format | Patent |
Language | English Japanese |
Published |
17.10.2019
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Subjects | |
Online Access | Get full text |
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Summary: | To provide a technology that can reduce the size of a capacitor in a power buffer device.SOLUTION: An active buffer circuit 8 controls such that, for a passive capacitor Cp and an active capacitor Ca connected in series to a DC link 6 of a power conditioner, the voltage of the active capacitor Ca becomes a voltage in which the voltage of the active capacitor Ca carries a DC bias component of the voltage of the passive capacitor Cp in addition to a voltage in which increase and decrease are reversed with respect to the voltage of the passive capacitor Cp.SELECTED DRAWING: Figure 2
【課題】電力バッファ装置において、コンデンサのサイズを低減することが可能な技術を提供する。【解決手段】アクティブバッファ回路8は、パワーコンディショナの直流リンク6に直列に接続されたパッシブコンデンサCpとアクティブコンデンサCaに対して、アクティブコンデンサCaの電圧が、パッシブコンデンサCpの電圧と増減を反転させた電圧に加えて、アクティブコンデンサCaの電圧がパッシブコンデンサCpの電圧のDCバイアス成分を担う電圧となるように制御する。【選択図】図2 |
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Bibliography: | Application Number: JP20180068789 |