SEMICONDUCTOR STORAGE DEVICE

To provide a semiconductor storage device capable of suppressing reduction in formation density of memory cells, and of improving electric characteristics.SOLUTION: A semiconductor storage device comprises a substrate, a laminate, a plurality of columnar parts CL, a plurality of connection parts 40,...

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Bibliographic Details
Main Authors IIJIMA JUN, TAGAMI MASAYOSHI, NISHIMURA TAKAHITO, USUI TAKAMASA
Format Patent
LanguageEnglish
Japanese
Published 03.10.2019
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Summary:To provide a semiconductor storage device capable of suppressing reduction in formation density of memory cells, and of improving electric characteristics.SOLUTION: A semiconductor storage device comprises a substrate, a laminate, a plurality of columnar parts CL, a plurality of connection parts 40, and a plurality of wirings BL. The plurality of wirings extend in a first direction parallel to an upper surface of the substrate. When seen from a second direction perpendicular to a lamination direction of the laminate and to the first direction, a part of the first connection part connected with the first wiring, among the plurality of wirings is overlapped with a part of the second connection part connected with the second wiring adjacent to the first wiring in the second direction.SELECTED DRAWING: Figure 2 【課題】メモリセルが形成される密度の低下を抑制し、電気特性が向上した半導体記憶装置を提供する。【解決手段】実施形態に係る半導体記憶装置は、基板と、積層体と、複数の柱状部CLと、複数の接続部40と、複数の配線BLと、を備える。前記複数の配線は、前記基板の上面に平行な第1方向に延びる。前記積層体の積層方向及び前記第1方向に垂直な第2方向から見たときに、前記複数の配線のうちの第1の配線に接続される第1接続部の一部は、前記第1配線と前記第2方向に隣接する第2配線に接続される第2接続部の一部と重なる。【選択図】図2
Bibliography:Application Number: JP20180053939