SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRIC POWER CONVERSION DEVICE
To provide a semiconductor device, a manufacturing method of the semiconductor device, and an electric power conversion device, which are improved so as to suppress a current concentration to a cell part.SOLUTION: A semiconductor device comprises: a semiconductor chip; a cell surface electrode part;...
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Main Authors | , , , |
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Format | Patent |
Language | English Japanese |
Published |
05.09.2019
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Subjects | |
Online Access | Get full text |
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Summary: | To provide a semiconductor device, a manufacturing method of the semiconductor device, and an electric power conversion device, which are improved so as to suppress a current concentration to a cell part.SOLUTION: A semiconductor device comprises: a semiconductor chip; a cell surface electrode part; and a peripheral surface structure part. The semiconductor chip includes: a cell part which is a portion of a central region in a plain view, and in which a transistor element is provided; and a peripheral part provided in the circumference of the cell part in the plain view. The cell surface electrode part is provided onto the cell part. The peripheral surface structure part is provided onto the peripheral part, and has an upper surface higher than that of the cell surface electrode part. The peripheral part is formed thinner than that of the cell part so that the back surface of the peripheral part is more recessed than that of the cell part. The thickness of the cell part is tc. The magnitude of a step of the cell part and the peripheral part in the back surface is dtb. In this case, the following formula is satisfied: 0%<dtb/tc≤1.5%.SELECTED DRAWING: Figure 2
【課題】セル部への電流集中を抑制することができるように改善された半導体装置およびその製造方法並びに電力変換装置を提供する。【解決手段】半導体装置は、半導体チップと、セル表面電極部と、周縁表面構造部とを備える。半導体チップは、平面視における中央領域の部位でありトランジスタ素子が設けられたセル部と、平面視においてセル部の周りに設けられた周縁部とを有する。セル表面電極部は、セル部の上に設けられている。周縁表面構造部は、周縁部の上に設けられ、セル表面電極部の上面よりも高い上面を持つ。セル部の裏面よりも周縁部の裏面が凹むように周縁部がセル部よりも薄くされている。セル部の厚さを、tcとする。裏面におけるセル部と周縁部との段差の大きさを、dtbする。この場合において、0%<dtb/tc≦1.5%である。【選択図】図2 |
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Bibliography: | Application Number: JP20180033692 |