SEMICONDUCTOR DEVICE

• Main Authors: NAKAMURA MASAHIRA, YASUDA TAKAHIRO, SHIMAFUJI TAKAYUKI
• Format: Patent
• Language: English; Japanese
• Published: 22.08.2019
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To provide a semiconductor device in which the occurrence of cracks is suppressed.SOLUTION: The semiconductor device is provided that comprises: a semiconductor chip; a frame member which has a chip mounting surface and in which the semiconductor chip is provided on the chip mounting surface; a first suspension lead connected to the frame member and provided in either side of the frame member, and satisfies expression M1≤L1+L2, where L1 denotes a distance between the placement position of the first suspension lead and the corner of the chip mounting surface adjacent to the first suspension lead, L2 denotes a distance between the placement position of the second suspension lead and the corner of the chip mounting surface adjacent to the second suspension lead, and M1 denotes a distance between the placement position of the first suspension lead and the placement position of the second suspension lead.SELECTED DRAWING: Figure 1A 【課題】クラックの発生が抑制された半導体装置を提供する。【解決手段】半導体チップと、チップ載置面を有し、チップ載置面に半導体チップが設けられたフレーム部材と、フレーム部材と接続され、フレーム部材のいずれかの辺に設けられた第１の吊りリードおよび第２の吊りリードと、を備え、第１の吊りリードの配置位置と、第１の吊りリードと近接するチップ載置面の角部との距離をＬ１とし、第２の吊りリードの配置位置と、第２の吊りリードと近接するチップ載置面の角部との距離をＬ２とし、第１の吊りリードの配置位置と、第２の吊りリードの配置位置との距離をＭ１とすると、Ｍ１≦Ｌ１＋Ｌ２を満たす半導体装置を提供する。【選択図】図１Ａ