MICROCONTROLLER AND CONTROL METHOD OF MICROCONTROLLER
To provide a microcontroller suppressing power consumption at debugging.SOLUTION: A microcontroller 100 according to the present invention comprises a first signal processing circuit 111, a second signal processing circuit conducting the same signal processing as the first signal processing circuit...
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Main Authors | , |
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Format | Patent |
Language | English Japanese |
Published |
18.04.2019
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Subjects | |
Online Access | Get full text |
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Summary: | To provide a microcontroller suppressing power consumption at debugging.SOLUTION: A microcontroller 100 according to the present invention comprises a first signal processing circuit 111, a second signal processing circuit conducting the same signal processing as the first signal processing circuit 113, a comparator 117 that compares a processing result of the first signal processing circuit with a processing result of the second signal processing circuit, and outputs an error signal when detecting an error, a suppression signal input part that receives a suppression signal to suppress operations of the second signal processing circuit and the comparator 117, a suppression circuit 170 that receives a suppression signal from the suppression signal input part and suppresses operations of the second signal processing circuit and the comparator, and a pseudo-error signal output circuit 112 outputs a pseudo-error signal instead of an error signal when the operations of the second signal processing circuit and the comparator are suppressed.SELECTED DRAWING: Figure 2
【課題】デバッグ時の消費電力増加を抑制したマイクロコントローラを提供すること。【解決手段】本発明にかかるマイクロコントローラ100は、第1信号処理回路111と、第1信号処理回路と同様の信号処理をする第2信号処理回路113と、第1信号処理回路の処理結果と第2信号処理回路の処理結果とを比較してエラーを検出した場合にはエラー信号を出力する比較回路117と、第2信号処理回路及び比較回路117の動作を抑制するための抑制信号を受け取る抑制信号入力部と、抑制信号入力部から抑制信号を受け取り、第2信号処理回路及び比較回路の動作を抑制する抑制回路170と、第2信号処理回路及び比較回路の動作を抑制した場合に、エラー信号に代えて、擬似エラー信号を出力する擬似エラー信号出力回路112と、を備える。【選択図】図2 |
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Bibliography: | Application Number: JP20170184355 |