MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
To provide a memory device capable of detecting a structural defect by in-line inspection.SOLUTION: A memory device includes: a plurality of components each including memory cells three-dimensionally arranged; a transistor electrically connected to at least one of the plurality of components; an ins...
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Main Authors | , , , |
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Format | Patent |
Language | English Japanese |
Published |
04.04.2019
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Subjects | |
Online Access | Get full text |
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Summary: | To provide a memory device capable of detecting a structural defect by in-line inspection.SOLUTION: A memory device includes: a plurality of components each including memory cells three-dimensionally arranged; a transistor electrically connected to at least one of the plurality of components; an inspection pad connected in series to at least one of the plurality of components via the transistor; and wiring electrically connected to the inspection pad and a gate of the transistor and capable of providing a common potential to the inspection pad and the gate in order to turn the transistor into an off state.SELECTED DRAWING: Figure 1
【課題】インライン検査により構造欠陥を検出可能な記憶装置を提供する。【解決手段】記憶装置は、3次元配置されたメモリセルを含む複数の構成要素と、前記複数の構成要素のうちの少なくとも1つに電気的に接続されたトランジスタと、前記複数の構成要素のうちの少なくとも1つに前記トランジスタを介して直列接続された検査パッドと、前記検査パッドおよび前記トランジスタのゲートに電気的に接続され、前記トランジスタをオフ状態とするために両者に共通な電位を供給可能な配線と、を備える。【選択図】図1 |
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Bibliography: | Application Number: JP20170177003 |