SEMICONDUCTOR STORAGE DEVICE

To provide a semiconductor storage device which suppresses occurrence of stuck-off faults while suppressing an increase in circuit scale.SOLUTION: In a semiconductor storage device according to one embodiment, a first pulse voltage is applied to a resistance change element so as to change from a hig...

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Bibliographic Details
Main Authors HAYASHI YOSHIHIRO, KOTAKE NAOYA
Format Patent
LanguageEnglish
Japanese
Published 14.03.2019
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Summary:To provide a semiconductor storage device which suppresses occurrence of stuck-off faults while suppressing an increase in circuit scale.SOLUTION: In a semiconductor storage device according to one embodiment, a first pulse voltage is applied to a resistance change element so as to change from a high resistance state to a low resistance state, and a second pulse voltage having the opposite polarity to the first pulse voltage is applied to the resistance change element so as to change from the low resistance state to the high resistance state. When changing from the high resistance state to the low resistance state, a third pulse voltage having the same polarity as the second pulse voltage and having an absolute value smaller than that of the second pulse voltage is applied to the resistance change element subsequently to the first pulse voltage.SELECTED DRAWING: Figure 10 【課題】回路規模の増大を抑制しつつ、OFF固着の発生を抑制すること。【解決手段】一実施の形態に係る半導体記憶装置では、高抵抗状態から低抵抗状態に変化するように抵抗変化素子に対して第1のパルス電圧を印加すると共に、低抵抗状態から高抵抗状態に変化するように抵抗変化素子に対して第1のパルス電圧と反対の極性を有する第2のパルス電圧を印加する。高抵抗状態から低抵抗状態に変化させる際、第2のパルス電圧と同じ極性を有し、かつ、第2のパルス電圧よりも絶対値が小さい第3のパルス電圧を、第1のパルス電圧に続けて抵抗変化素子に対して印加する。【選択図】図10
Bibliography:Application Number: JP20170164206