SOLID-STATE IMAGING ELEMENT AND METHOD OF MANUFACTURING THE SAME
To electrically connect between semiconductor substrates by fine plugs, in a solid-state imaging element having two or more semiconductor substrates laminated vertically.SOLUTION: An insulating film IF1 that covers a first rear face of a semiconductor substrate SB1 having a light receiving element,...
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Main Authors | , , |
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Format | Patent |
Language | English Japanese |
Published |
10.01.2019
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Subjects | |
Online Access | Get full text |
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Summary: | To electrically connect between semiconductor substrates by fine plugs, in a solid-state imaging element having two or more semiconductor substrates laminated vertically.SOLUTION: An insulating film IF1 that covers a first rear face of a semiconductor substrate SB1 having a light receiving element, and an interlayer insulating film IL2 that covers a second principal surface of a semiconductor substrate SB2 mounting a semiconductor element, are bonded with each other. At the bonding surface, a plug PG1 penetrating through the insulating film IF1, and a plug PG2 buried in a connection hole on an upper surface of the interlayer insulating film IL2, are bonded. The light receiving element and the semiconductor element are electrically connected with each other via the plugs PG1 and PG2.SELECTED DRAWING: Figure 1
【課題】縦方向に積層された2以上の半導体基板を有する固体撮像素子において、半導体基板同士の間を微細なプラグにより電気的に接続する。【解決手段】受光素子を有する半導体基板SB1の第1裏面を覆う絶縁膜IF1と、半導体素子を搭載した半導体基板SB2の第2主面を覆う層間絶縁膜IL2とを互いに接合する。その接合面では、絶縁膜IF1を貫通するプラグPG1と、層間絶縁膜IL2の上面の接続孔内に埋め込まれたプラグPG2とが接合しており、前記受光素子と前記半導体素子とは、プラグPG1、PG2を介して電気的に接続されている。【選択図】図1 |
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Bibliography: | Application Number: JP20170117593 |