COMPOUND SEMICONDUCTOR INTEGRATED CIRCUIT AND MANUFACTURE METHOD THEREOF

To provide a compound semiconductor integrated circuit provided with an adhesion improving film capable of preventing moisture from penetrating into a circuit and ensuring moisture resistance in an integrated circuit chip.SOLUTION: A compound semiconductor integrated circuit according to the present...

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Bibliographic Details
Main Authors KURISHIMA KENJI, IDA MINORU
Format Patent
LanguageEnglish
Japanese
Published 27.12.2018
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Summary:To provide a compound semiconductor integrated circuit provided with an adhesion improving film capable of preventing moisture from penetrating into a circuit and ensuring moisture resistance in an integrated circuit chip.SOLUTION: A compound semiconductor integrated circuit according to the present invention formed on a semiconductor substrate and having an internal circuit covered with an inorganic insulating protective film includes a bonding pad including gold, an adhesion improving film that is formed in contact with a peripheral region on the bonding pad and includes titanium, an organic interlayer insulating film in which a partial region is formed on a peripheral region of the bonding pad, and the inorganic insulating protective film formed on the organic interlayer insulating film and partly on the adhesion improving film.SELECTED DRAWING: Figure 2 【課題】水分が回路内部へ侵入するのを防ぎ、集積回路チップ自体での耐湿性を確保することができる密着性改善膜を設けた化合物半導体集積回路を提供する。【解決手段】本発明の半導体集積回路は、半導体基板上に形成され、内部回路が無機絶縁性保護膜で覆われた化合物半導体集積回路において、金を含むボンディングパッドと、前記ボンディングパッド上の周辺領域に接して形成されたチタンを含む密着性改善膜と、一部領域が前記ボンディングパッドの周辺領域上に形成された有機層間絶縁膜と、前記有機層間絶縁膜上および一部が前記密着性改善膜上に接して形成された前記無機絶縁性保護膜と、を有する。【選択図】図2
Bibliography:Application Number: JP20170109423