ARITHMETIC DEVICE AND ARITHMETIC SYSTEM

To provide an arithmetic device that achieves improvement in operation performance, without increasing the circuit scale.SOLUTION: An arithmetic device 1A comprises: a data multiplexer 11 which outputs upper level data din1_h as output data dout1 and output data dout5, and outputs lower level data d...

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Bibliographic Details
Main Authors TSUBOUCHI YOSHIYUKI, MURANUSHI TAKAYUKI, NAMURA TAKESHI, MAKINO JUNICHIRO
Format Patent
LanguageEnglish
Japanese
Published 06.12.2018
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:To provide an arithmetic device that achieves improvement in operation performance, without increasing the circuit scale.SOLUTION: An arithmetic device 1A comprises: a data multiplexer 11 which outputs upper level data din1_h as output data dout1 and output data dout5, and outputs lower level data din1_l as output data dout3 and output data dout7, outputs upper level data din2_h as output data dout2, and outputs lower level data din2_l as output data dout4, and outputs upper level data din3_h as output data dout6, and outputs lower level data din3_l as output data dout8, when a MODE signal indicates a second operation mode; and multipliers 12-15 which multiply two output data, respectively.SELECTED DRAWING: Figure 3 【課題】回路規模を拡大することなく、演算性能を向上可能な演算装置を提供すること。【解決手段】演算装置１Ａは、ＭＯＤＥ信号が第２演算モードを示す場合には、上位データｄｉｎ１＿ｈを出力データｄｏｕｔ１及び出力データｄｏｕｔ５とし、下位データｄｉｎ１＿ｌを出力データｄｏｕｔ３及び出力データｄｏｕｔ７として出力し、上位データｄｉｎ２＿ｈを出力データｄｏｕｔ２とし、下位データｄｉｎ２＿ｌを出力データｄｏｕｔ４として出力するとともに、上位データｄｉｎ３＿ｈを出力データｄｏｕｔ６とし、下位データｄｉｎ３＿ｌを出力データｄｏｕｔ８として出力するデータマルチプレクサ１１と、それぞれが２つの出力データの乗算を行う乗算器１２〜１５と、を備える。【選択図】図３
Bibliography:Application Number: JP20170095803