IMAGE FORMATION DEVICE

To provide an image formation device that can suppress an image failure caused by interference of a development AC bias with a charging direct-current bias.SOLUTION: An image formation device 10 includes: an image carrier 1; a charging member 2; electrostatic image formation means 3; a development m...

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Bibliographic Details
Main Author MIYAMOTO AKINORI
Format Patent
LanguageEnglish
Japanese
Published 06.12.2018
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Summary:To provide an image formation device that can suppress an image failure caused by interference of a development AC bias with a charging direct-current bias.SOLUTION: An image formation device 10 includes: an image carrier 1; a charging member 2; electrostatic image formation means 3; a development member 4b; a charging high-voltage circuit 300; a charging high-voltage conveying circuit 800 for connecting the charging member 2 and the charging high-voltage circuit 300 to each other; a development high-voltage circuit 400 for outputting a development bias; and a development high-voltage conveying circuit 900 for connecting the development member 4b and the development high-voltage circuit 400 to each other. When the capacity between the charging high-voltage conveying circuit 800 and the development high-voltage conveying circuit 900 is C1 and the inter-peak voltage of the AC component of a developing bias is Vpp, a capacitor of which capacity C2 satisfies the relation of {C1/(C1+C2)}×Vpp[V]≤5[V] is provided in the charging high-voltage conveying circuit 800 or in the charging high-voltage circuit 300.SELECTED DRAWING: Figure 5 【課題】帯電直流バイアスに対する現像交流バイアスの干渉による画像不良を抑制することのできる画像形成装置を提供する。【解決手段】画像形成装置10は、像担持体1と、帯電部材2と、静電像形成手段3と、現像部材4bと、帯電高圧回路300と、帯電部材2と帯電高圧回路300とを結線するための帯電高圧伝達回路800と、現像バイアスを出力する現像高圧回路400と、現像部材4bと現像高圧回路400とを結線するための現像高圧伝達回路900と、を有し、帯電高圧伝達回路800と現像高圧伝達回路900との間の線間容量をC1、現像バイアスの交流成分のピーク間電圧をVppとしたとき、次式、{C1/(C1+C2)}×Vpp[V]≦5[V]を満たす容量C2のコンデンサが帯電高圧回路300内又は帯電高圧伝達回路800内に設けられている構成とする。【選択図】図5
Bibliography:Application Number: JP20170100178